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[Other resource] 曼彻斯特编解码 Xilinx提供_vhdl

Description: 曼彻斯特编解码 Xilinx提供的VHDL的源代码-Manchester codec Xilinx provide VHDL source code
Platform: | Size: 10605 | Author: 陈旭 | Hits:

[Other resource] USB控制器VHDL程序

Description: USB控制器VHDL程（usb_xilinx_vhdl）,用XILINX公司的FPGA实现-VHDL-USB controller (usb_xilinx_vhdl) XILINX FPGA
Platform: | Size: 61085 | Author: 夏社 | Hits:

[Other resource] Xilinx-modelsim-library

Description: Xilinx的modelsim　仿真库！里面有许多库函数，对于ｖｌｏｇ或ｖｈｄｌ编程有很多好的源代码可以剪切！-Xilinx modelsim simulation library! There are many libraries, vlog or VHDL programming a lot of good source code can shear!
Platform: | Size: 32190807 | Author: 杨俊涛 | Hits:

[Other resource] simple_fm_receiver.tar

Description: FM收音机的解码及控制器VHDL语言实现，Xilinx提供的．别谢我．-FM radio decoder and controller VHDL, Xilinx provide. I thank other.
Platform: | Size: 70152 | Author: 喻袁洲 | Hits:

[Other resource] ise9tut

Description: VHDL Xilinx ISE 9.1i
Platform: | Size: 1648638 | Author: 孙延腾 | Hits:

[Other resource] cpu-leon3-xilinx-ml505

Description: 一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了在Xilinx公司的ml505 FPGA上的位码文件和配置文件，可以直接下载使用！
Platform: | Size: 391428 | Author: zhao onely | Hits:

[Software Engineering] VHDL

Description: 本系统使用VHDL语言进行设计，采用自上向下的设计方法。目标器件选用Xilinx公司的FPGA器件，并利用Xilinx ISE 7.1 进行VHDL程序的编译与综合，然后用Modelsim Xilinx Edition 6.1进行功能仿真和时序仿真。
Platform: | Size: 297917 | Author: 西西 | Hits:

[Other resource] cntl_ddr3(xilinx)

Description: xilinx ddr3最新VHDL代码,通过调试
Platform: | Size: 101306 | Author: zhang chi | Hits:

[VHDL-FPGA-Verilog] 并串转换XILINX

Description: 嵌入式中实现并串转换的VERILOG程序+VHDL程序两个版本，是xilinx版本的，权威但繁琐
Platform: | Size: 1411 | Author: awenor | Hits:

[Program doc] VHDL上机手册(基于Xilinx ISE & ModelSim).doc

Description: VHDL上机手册(基于Xilinx ISE & ModelSim).doc
Platform: | Size: 730112 | Author: panqihe | Hits:

[VHDL-FPGA-Verilog] FPGA 做的音频信号分析仪

Description: 使用 Xilinx 的 FPGA 做的音频信号分析仪,附详细说明及 VHDL 源程序.
Platform: | Size: 17190667 | Author: xyz543 | Hits:

[Documents] Writing efficient testbenches完整版

Description: Xilinx xapp199参考设计并不全， 这是我自己找到的差的部分，并加了进来。
Platform: | Size: 6638331 | Author: liu_tiequan@126.com | Hits:

[VHDL-FPGA-Verilog] uart_vhdl_xilinx

Description: xilinx的串口仿真程序-xilinx simulator programme of serial port
Platform: | Size: 9216 | Author: 赵兴涛 | Hits:

[VHDL-FPGA-Verilog] I2C总线控制器 Xilinx提供

Description: 用Verilog HDL实现I2C总线功能，对I2C总线有很大帮助-I2C bus contrll functions implemented by Verilog HDL.
Platform: | Size: 889856 | Author: 司法 | Hits:

[SCM] 51corevhdl

Description:
Platform: | Size: 944128 | Author: 傅林 | Hits:

[Other] VHDL-FIR-filters

Description: ynthesizable FIR filters in VHDL with a focus on optimal mapping to Xilinx DSP slices. This repository contains a transposed direct form, systolic form for single-rate FIR filters and a custom parallel polyphase FIR decimating filter. The VHDL has been synthesized with Xilinx Vivado 2015.1 to confirm the correct DSP cascade chain is inferred.
Platform: | Size: 37888 | Author: Abkoti | Hits:

[VHDL-FPGA-Verilog] 3-8译码器VHDL描述

Description: 在开发板FPGA：Spartan-3E 系列，型号：XC3S500E，封装：FGT320，速度-4；利用XIlinX编程，使用VHDL语言来描述组合逻辑器件3-8译码器(In the FPGA:Spartan-3E development board series, XC3S500E, FGT320, -4 package: speed; the use of XIlinX programming, using VHDL language to describe the combination of the 3-8 decoder logic device)
Platform: | Size: 10240 | Author: lixilin | Hits:

[VHDL-FPGA-Verilog] 可逆计数器VHDL描述

Description: 在开发板FPGA：Spartan-3E 系列，型号：XC3S500E，封装：FGT320，速度-4，利用Xilinx ISE软件，利用VHDL软件编写可逆计数器，包含实验说明以及代码实现VHDL.doc文件,UCF管脚绑定文件(In the FPGA:Spartan-3E development board series, XC3S500E, package: FGT320, speed -4, using Xilinx ISE software, written in a reversible counter by using VHDL software, including experimental description and code to achieve the VHDL.doc file, the UCF pin binding file)
Platform: | Size: 12288 | Author: lixilin | Hits:

[VHDL-FPGA-Verilog] 按键去抖电路VHDL描述

Description: 在开发板FPGA：Spartan-3E 系列，型号：XC3S500E，封装：FGT320，速度-4，利用Xilinx ISE软件，利用VHDL软件编写按键去抖电路，包含实验说明以及代码实现VHDL.doc文件,UCF管脚绑定文件(In the FPGA:Spartan-3E development board series, XC3S500E, package: FGT320, speed -4, using Xilinx ISE software, write the debounce circuit by using VHDL software, including experimental description and code to achieve the VHDL.doc file, the UCF pin binding file)
Platform: | Size: 29696 | Author: lixilin | Hits:

[Communication-Mobile] 4_pll_test

Description: 基于Xilinx的Artix7实现PLL。(Implementation of PLL based on Artix7)
Platform: | Size: 625664 | Author: kang30 | Hits:
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